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Redrawing the Field: RISC Assessment
The relevance of the term RISC (Reduced Instruction Set Computer) dates back to when early x86 processors were known as CISC (Complex Instruction Set Computers). Then, the battle between Unix and x86 was known as RISC vs. CISC. But the distinction has grown outdated, because, since the Pentium, x86 processors are now actually RISC-based.
“The old RISC vs. CISC argument is really obsolete,” says Glaskowsky. “All CISC processors today are RISC processors with translation hardware to provide compatibility with the the x86 instruction set.” Intel’s Itanium architecture is, in fact, based on a non-RISC approach: the VLIW (Very Long Instruction Word) design.
Another Playing Field Revision: Questions of Scale
“The main reason to go with x86 is for cost efficiency,” Glaskowsky asserts. “Scalability is limited, however,” he cautions, noting that the sweet spot of x86-based servers is in 4-way servers.
According to Glaskowsky, SPARC, POWER, and Itanium are all strong when it comes to scalability. “Some of these systems can provide large numbers of CPUs sharing a single memory image and operating system,” he says. “Customers pay disproportionately for this scalability, but it solves problems the commodity systems can’t touch.”
The Perils of Propriety
Enterprises comparing processors must also confront yet another option: proprietary vs. open? “IT professionals are voting with their dollars for open, standards-based approaches which allow choice in what they deploy,” says Intel spokesperson Scott McLaughlin, “They don’t want to be locked into any one vendor or architecture.”
This assessment falls much more in line with Intel’s just-announced 32-/64-bit strategy than with a hard push for the now de-facto beleaguered and slightly proprietary VLIW-based Itanium line.
Even Sun, which has a stake in the proprietary front, does not discount x86. “We believe the future of processor design is based on using simpler, replicated execution engines,” says Harlan McGhan, Sun Strategic Marketing Manager for UltraSPARC processors, “Itanium, by contrast is based on the conviction that the future of processor design lies in the direction of engineering ever larger and more complicated execution engines.”
Sun’s numerous x86 offerings may fit this statement at the expense of its 64-bit SPARC processor. “Sun is a proprietary solution and a customer [of Intel],” McLaughlin notes.
Opportunity Knocks for Opteron: As Sun and Intel continue the processor debate, the space between Intel’s 32-bit scale-out or 64-bit scale-up and Sun’s 64-bit SPARC approach has been just large enough to give AMD’s Opteron some strategic maneuvering room. Opteron weds 64-bit and 32-bit computing on a single x86 chip with extremely competitive processor and bus speeds. Despite its 64-bit focus, however, Opteron is not aiming for the high end of the scalability side; it currently allows 1-way to 8-way server architectures, as opposed to the 100-way (and greater) architectures Itanium-2 and SPARC allow.
“Opteron,” trumpets AMD’s Phil Hughes, “is strongly positioned against Intel’s Xeon processor when it comes to true enterprise computing.” The chip, Hughes says, is “competitively priced against Xeon” and “delivers the industry’s best 32-bit performance with the capability for 64-bit computing as the applications become available.”
Opteron allows CIOs to explore 64-bit computing without committing to it. Such functional schizophrenia is born out in the current strategies of HP, Sun, and IBM.
HP Hedges its Bets: Last week, internetnews.com reported HP hinting it may announce an Opteron-based server soon. HP’s merger history leaves it well-equipped, possibly even predisposed, to juggle multiple processor architectures. But HP’s potential endorsement of a 64-bit x86 chip has been seen as a blow to the Itanium design, which it helped Intel pioneer. While HP’s potential tacit endorsement of Opteron will not mark the end of its support for Itanium, it offers validation for the 64-bit x86 model.
Sun Sees the Light: Although Sun recently added x86 and Opteron servers to match its stable of highly scalable SPARC servers, it doesn’t view this as contrary to its SPARC model. “In short,” says Sun’s McGhan, “SPARC is our vehicle for technological innovation, enabling us to provide customers with the advantages that come from advanced technology.” Opteron and Xeon, McGhan continues, “are our vehicles for exploiting industry-scale economics, enabling us to provide our customers with the advantages that come from cost efficiencies.” McGhan doesn’t expect recent SPARC performance developments, like the UltaSPARC IV’s dual-thread capable Chip MultiThreading (CMT), to hit the “commodity” zone before 2010.
IBM Mixes POWER Sources: IBM also recently added Opteron to its stable of Itanium, x86, and POWER and other proprietary chip-based servers. IBM’s Power 970 chip, which runs in Big Blue’s iSeries POWER servers and Apple G5s, is also 32-bit and 64-bit capable and performs well. Of course, a paradigm shift to PowerPC dominance seems unlikely, given x86’s and SPARC’s overall momentum and installed base.
Given Intel’s recent 32/64 x86 announcement, AMD’s Opteron now simply holds a
two-year head start in the space, as opposed to exclusive ownership. Given the strength of Intel’s user base, marketing muscle, and research and development arms, if AMD is to remain competitive, it will need to maintain a technical advantage in realms such as bus speed..
