IBM Introduces Self-Assembling Chip
May 4, 2007
IBM's chip researchers have been in anything but a vacuum lately.
They have been busy developing a special polymer that can self-assemble, putting an insulator around wires at the nano-scale level and allowing the trend for smaller/faster/cooler chips to continue.
IBM modeled the concept after self-assembly seen in nature, such as the way a seashell, snowflakes or tooth enamel forms. The technique, called "airgaps" by IBM scientists, isn't an entirely accurate term, as the gaps are actually a vacuum with no air.
Airgaps are made by coating a silicon wafer with a layer of a special polymer that, when heated, forms a honeycomb of trillions of uniform tiny holes just 20 nanometers across, with a honeycomb wall 20 nanometers across. The pattern is then used to create the copper wiring on top of a chip and the insulating gaps that let electricity flow smoothly.
The technique causes a vacuum of air to form between the copper wires in a computer chip. This is important because as the wires drop in nanometers, they lose electricity.
Dealing with power leakage has become a growing concern for chip makers as CPUs get increasingly smaller. Music aficionados who remember the days of vinyl know there was only so much room to put on an album side because if you tried to put more music on the record, the grooves started to bleed together. It's a similar situation here.
"It's like pouring water down a pipe," said Dave Lammers, director of WeSRCH.com, a research site run by VLSI Research. "Pour it down a one-inch pipe, that's OK. When you try to pour the same amount down a straw, that gets tough."
As the copper wires shrink, there's more resistance as the electronics move down them. So as the wires shrink, they get slower, he explained. "The airgap allows them to keep making the wires smaller without the charge leaking from one wire to the adjacent wire. Airgaps put a better insulation, to a higher degree, between the metal wires."
Dan Edelstein, IBM fellow and chief scientist at IBM's research division, told internetnews.com that "this is going to keep enabling us to scale for several generations beyond." Copper wire was reaching a limit of how small it could be made without significant leakage.
The airgaps reduce the energy needed to put signals on these wires, so the whole chip can run cooler or faster depending on the tradeoff you want to take," said Edelstein. Circuits can speed up by as much as 35 percent, based on the drop in capacitance.
That drop isn't across the board, however. It only affects circuits heavily dominated by the wiring delay, and some circuits have short wires and won't really benefit. Edelstein said he could see a clock speed increase of up to 10 percent or a drop in heat by up to 15 percent from this new process.
Lammers said that's all a good thing for processor manufacturing. "You get all the benefits when you shrink the logic device from this. You can add more functions and have less power consumption and a lower cost to manufacture. All the good things that happen with processors now will keep on going," he said.
The process can be used in current 65nm and 45nm semiconductor manufacturing, since the gaps are only 20nm. IBM expects to have it in production by 2009 and use it in chips for its high-end servers first. The company also will decide if it wishes to license the manufacturing process to its chip partners, which includes AMD.
In January, Intel announced its own breakthrough in dealing with electricity leakage in chips. The hi-k and metal gate news was considered a major breakthrough because the company was rapidly running out of room to keep Moore's Law going.
This article was originally published on internetnews.com.