Intel Revises Xeon 'Prestonia'

By Michael Singer (Send Email)
Posted Jul 15, 2003


Intel Monday refreshed its high-end Xeon processor line with a larger cache to target next-generation workstations and servers. Intel Monday refreshed its high-end Xeon processor line with a larger cache to target next-generation workstations and servers.

The new Intel Xeon processor (code-named "Prestonia") runs at 3.06 GHz and features a 1 MB level three (L3) cache with a 533 MHz system bus. Previous chips had about half the amount of cache available. The chips are now retailing for $690 in 1,000-unit quantities.

The Santa Clara, Calif.-based chip-making giant said the new processor has drop-in compatibility with systems designed with the Intel E7501 (for servers) or Intel E7505 (for workstations) chipsets, Intel PRO Gigabit Ethernet Network Connections, and Intel Server RAID Controllers. It is also hardware-compatible with systems using dual Intel Xeon processors.

Intel is positioning the new chip as a complement to its latest Xeon processor MP (code-named "Gallatin") introduced back in June.

Intel says the Xeon Prestonia family is designed for use in general-purpose servers for Web hosting, data caching, search engines, security, streaming media, and high performance computing. In workstations it can be used for digital content creation, mechanical and electrical design, financial analysis, and 3D modeling.

The idea behind increasing on-die cache is to create a fast memory reservoir. The company says data stored in the processor's on-die cache is faster to access than data stored on the hard drive or other system memory.

Already, server vendors IBM, Dell Computer, and Hewlett-Packard have hopped on board the bigger cached Xeon and have pledged support. Dell plans to include the chips in its upcoming Precision Workstation 450 and 650 platforms.

The product family is also part of Intel's "real server" campaign, which targets mostly small to midsize enterprises on the benefits of choosing servers with Intel processors.

This article was originally published on Silicon Valley News.

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